Memory elements with leakage compensation

Details Memory elements with leakage compensation Memory elements with leakage compensation

2011-01-04

2011-01-04

Le, Thong Q (Department: 2827)

Static information storage and retrieval

Read/write circuit

Separate read and write bus

C365S189110, C365S203000, C365S189050, C365S230010, C365S189150

Reexamination Certificate

active

07864603

ABSTRACT:
Integrated circuits with memory elements are provided. The memory elements may be arranged in an array. Data lines may be used to load data into the memory elements and may be used to read data from the memory elements. The memory elements may be used to store configuration data on a programmable logic device integrated circuit. Each memory element may have an output that supplies a programmable transistor gate with a static control signal. Data reading circuitry may be coupled to each data line to read data from an addressed memory element on that data line. The data reading circuitry for each data line may include a precharge transistor and an output latch. The output latch may contain cross-coupled inverters. An inwardly-directed inverter in the output latch may have a pull-up transistor that is connected in series with a current source.

REFERENCES:
patent: 5673231 (1997-09-01), Furutani
patent: 5748520 (1998-05-01), Asaka et al.
patent: 6552949 (2003-04-01), Silla et al.
patent: 6826074 (2004-11-01), Yamauchi
patent: 2007/0090857 (2007-04-01), Shau

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