Memory efficient gate array cell

Details Memory efficient gate array cell Memory efficient gate array cell

1993-09-07

1995-09-19

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Flip-flop

365156, 257206, G11C 1140

Patent

active

054522455

ABSTRACT:
A core cell (10) for a gate array circuit has been provided. The core cell has a transistor layout that facilitates efficient memory circuit design within the gate array. The core cell includes a first (14-22) and second (23-31) plurality of transistors of a first conductivity type, and a third plurality (52-63) of transistors of a second conductivity type wherein the third plurality of transistors are positioned between the first and second plurality of transistors. The third plurality of transistors having transistors of a first and second size wherein at least two transistors of the second size of the third plurality of transistors includes a common gate connection.

REFERENCES:
patent: 5157625 (1992-10-01), Barry
patent: 5272097 (1993-12-01), Shiota
patent: 5281842 (1994-01-01), Yasuda et al.
patent: 5289021 (1994-02-01), El Gamal

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