Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2007-09-28
2011-10-18
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711SE12069
Reexamination Certificate
active
08041912
ABSTRACT:
A memory device comprises a memory array, a status register coupled with the memory array, and a security register coupled with the memory array and the status register. The memory array contains a number of memory blocks configured to have independent access control. The status register includes at least one protection bit indicative of a write-protection status of at least one corresponding block of the memory blocks that corresponds to the protection bit. The security register includes at least one register-protection bit. The register-protection bit is programmable to a memory-protection state for preventing a state change of at least the protection bit of the status register. The register-protection bit is configured to remain in the memory-protection state until the resetting of the memory device.
REFERENCES:
patent: 6026016 (2000-02-01), Gafken
patent: 6446179 (2002-09-01), Baltar
patent: 1496517 (2004-05-01), None
patent: 1534492 (2004-10-01), None
“1st Office Action of China Counterpart Application”, issued on Jun. 24, 2010, p1-p10, in which the listed references were cited.
Chang Kuen-Long
Hung Chun-Hsiung
Kuo Yu-Lan
Lee Chun-Yi
Ahmed Hamdy
Bragdon Reginald
Jianq Chyun IP Office
MACRONIX International Co. Ltd.
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