Memory device with vertically embedded non-flash...

Details Memory device with vertically embedded non-flash... Memory device with vertically embedded non-flash...

2011-03-29

2011-03-29

Nguyen, Hiep T (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

Reexamination Certificate

active

07917691

ABSTRACT:
A system and a method for emulating a NAND memory system are disclosed. In the method, a command associated with a NAND memory is received. After receipt of the command, a vertically configured non-volatile memory array is accessed based on the command. In the system, a vertically configured non-volatile memory array is connected with an input/output controller and a memory controller. The memory controller is also connected with the input/output controller. The memory controller is operative to interface with a command associated with a NAND memory and based on the command, to access the vertically configured non-volatile memory array for a data operation, such as a read operation or write operation. An erase operation on the vertically configured non-volatile memory array is not required prior to the write operation. The vertically configured non-volatile memory array can be partitioned into planes, blocks, and sub-planes, for example.

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