Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2007-07-03
2009-11-24
Nguyen, Viet Q (Department: 2827)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S210140, C365S210120, C365S210150
Reexamination Certificate
active
07623400
ABSTRACT:
An embodiment of the invention relate to a memory device including a memory plane composed of memory cells located at the intersection of lines and columns, and a dummy path designed to output a signal to activate read amplifiers arranged at the bottom of the columns in the memory plane, said dummy path including dummy memory cells connected between two dummy bit lines means of selecting at least one dummy cell designed to discharge at least one of the dummy bit lines, and control means connected to the two dummy bit lines to generate said activation signal, characterized in that said device includes means of programming the number of selected cells to discharge at least said dummy bit line, to adjust the time at which said activation signal is output.
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French Search Report, FR 0606122 Dec. 21, 2006.
Genevaux Franck
Jacquet Francois
Graybeal Jackson LLP
Jablonski Kevin D.
Nguyen Viet Q
STMicroelectronics SA
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