Memory device with preread data management

Details Memory device with preread data management Memory device with preread data management

2007-03-13

2007-03-13

Sough, Hyung (Department: 2188)

Electrical computers and digital processing systems: memory

Address formation

Generating prefetch, look-ahead, jump, or predictive address

C711S103000, C711S137000, C711S154000

Reexamination Certificate

active

10811961

ABSTRACT:
The present invention provides a memory device that can flexibly decide the data to be preread. The memory device according to the present invention includes: a nonvolatile memory; a buffer memory having a higher access speed than the nonvolatile memory; and a control circuit. The control circuit creates a preread data management table that associates a logical address of preread data specified by a preread command inputted from the outside and a buffer memory address for storing the preread data. Moreover, the control circuit reads data specified by the command from the nonvolatile memory and stores it in the buffer memory as preread data. When a logical address specified in a read command inputted from the outside matches a logical address associated by the preread data management table, the control circuit outputs corresponding preread data from the buffer memory.

REFERENCES:
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patent: 6516389 (2003-02-01), Uchihori
patent: 6553476 (2003-04-01), Ayaki et al.
patent: 6625712 (2003-09-01), Shibazaki et al.
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patent: 6965967 (2005-11-01), Takaichi
patent: 2003/0041214 (2003-02-01), Hirao et al.
patent: 2001-125829 (2001-05-01), None

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