Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
Reexamination Certificate
2011-04-12
2011-04-12
Chung, Phung M (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error count or rate
C714S718000, C714S723000, C714S746000
Reexamination Certificate
active
07925936
ABSTRACT:
A method for storing data in a memory, which includes a plurality of analog memory cells, includes defining programming levels that represent respective combinations of at least first and second bits and are represented by respective nominal storage values. The data is stored by mapping the data to storage values selected from among the nominal storage values and writing the storage values to the memory cells. A condition is defined over two or more bit-specific error rates applicable respectively to at least the first and second bits. The bit-specific error rates include a first bit-specific error rate computed over the data stored by the first bits and a second bit-specific error rate computed, separately from the first bit-specific error rate, over the data stored by the second bits. The nominal storage values are set based on the bit-specific error rates so as to meet the condition.
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Anobit Technologies Ltd.
Chung Phung M
Knobbe Martens Olson & Bear LLP
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