Memory device with multiple input/output connections

Details Memory device with multiple input/output connections Memory device with multiple input/output connections

1996-06-07

1998-04-28

Arroyo, Teresa M.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Configuration or pattern of bonds

257203, 257784, H01L 2710, H01L 2348, H01L 2352

Patent

active

057448701

ABSTRACT:
A memory device is described which is fabricated as an integrated circuit and uses distributed bond pads for electrical connection to an external conductive lead. The distributed bond pads are attached to a external lead, thereby eliminating bus lines on the integrated circuit memory. Distributed buffer circuits are described which can be included with the distributed bond pads to increase data communication time between the memory device and an external processor.

REFERENCES:
patent: 5066999 (1991-11-01), Casper
patent: 5073816 (1991-12-01), Wakefield et al.
patent: 5208782 (1993-05-01), Sakuta et al.
patent: 5233220 (1993-08-01), Lamson et al.
patent: 5359224 (1994-10-01), Heinen et al.
patent: 5587607 (1996-12-01), Yasuda et al.

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