Memory device with memory cell including MuGFET and FIN...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE27084, C365S148000

Reexamination Certificate

active

08067792

ABSTRACT:
One embodiment of the present invention relates to a memory cell. The memory cell includes a multi-gate field effect transistor associated with a first region of a semiconductor fin. The memory cell also includes a fin capacitor coupled to a drain of the multi-gate field effect transistor and associated with a second region of the semiconductor fin, where the fin capacitor has an approximately degenerate doping concentration in the second region. Other devices and methods are also disclosed.

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patent: 2008/0237796 (2008-10-01), Doyle et al.
Subramanian et al., “Impact of fin width on digital and analog performance of n-FinFET,” 2007, Solid-State Electronics, vol. 51, p. 551-559.
Cho et al., “A novel spacer process for sub-10-nm thick vertical MOS and its integration with planar MOS device,” 2006, IEEE Transaction on nanotechnology, vol. 6, No. 5, p. 554-563.
Sze, “Semiconductor Devices, Physics and Tecnology,” 2002, p. 44.

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