Memory device with efficient redundancy using sense amplifiers

Details Memory device with efficient redundancy using sense amplifiers Memory device with efficient redundancy using sense amplifiers

1997-08-22

1999-07-06

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Bad bit

365210, G11C 1300

Patent

active

059205148

ABSTRACT:
A memory device is described which has memory storage cells coupled to data bit lines. Sense amplifier circuits are provided to receive input from the data bit lines and produce an output in response thereto. The memory includes circuitry which shifts the input to the sense amplifiers. Data bit lines from a neighboring sense amplifier is shifted to another sense amplifier such that redundant memory storage cells and data bit lines can be substituted for defective ones.

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