Memory device with current path cut-off circuit for sense amplif

Details Memory device with current path cut-off circuit for sense amplif Memory device with current path cut-off circuit for sense amplif

1991-04-15

1995-10-17

Epps, Georgia Y.

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

365205, 327 56, 327537, G11C 700

Patent

active

054596890

ABSTRACT:
A memory device has memory cells each of which is addressed according to a timing signal, current sense amplifiers each of which determines whether a current flows in the addressed memory cell or not and reads-out the data stored in such memory cell, a circuit which generates a control signal to become active at a timing when the memory cell Is addressed and to become inactive after the read-out of the stored data is completed by the current sense amplifier, and a circuit which cuts-off based on the control signal a current path of a steady-state current flowing in the current sense amplifier. It is possible to substantially reduce power consumption without sacrificing the capability of the read-out the stored data at a high speed.

REFERENCES:
patent: 4404660 (1983-09-01), Menachem
patent: 4758748 (1988-07-01), Takeuchi
patent: 4884241 (1989-11-01), Tanaka et al.
patent: 5050127 (1991-09-01), Mitsumoto et al.
patent: 5130580 (1992-07-01), Min et al.
patent: 5140199 (1992-08-01), Seo
patent: 5146427 (1992-09-01), Sasaki et al.
patent: 5175451 (1992-12-01), Ihara
patent: 5202854 (1993-04-01), Koike
patent: 5267198 (1993-11-01), Hatano et al.
patent: 5293338 (1994-03-01), Ihara

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