Memory device with barrier layer

Details Memory device with barrier layer Memory device with barrier layer

2006-05-30

2006-05-30

Booth, Richard A. (Department: 2812)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C438S261000

Reexamination Certificate

active

07053445

ABSTRACT:
A memory device may include a substrate, a dielectric layer formed on the substrate and a charge storage element formed on the dielectric layer. The memory device may also include an inter-gate dielectric formed on the charge storage element, a barrier layer formed on the inter-gate dielectric and a control gate formed on the barrier layer. The barrier layer prevents reaction between the control gate and the inter-gate dielectric.

REFERENCES:
patent: 6248628 (2001-06-01), Halliyal et al.
patent: 6596590 (2003-07-01), Miura et al.
patent: 2005/0194627 (2005-09-01), Nomoto et al.
Co-pending U.S. Appl. No. 11/135,492, filed May 24, 2005, entitled “Interface Layer Between Dual Polycrystalline Silicon Layers”, Mark Ramsbey et al., 20 pages.

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