Memory device with a plurality of memory cells, in...

Details Memory device with a plurality of memory cells, in... Memory device with a plurality of memory cells, in...

2005-11-09

2008-12-09

Phan, Trong (Department: 2827)

Static information storage and retrieval

Systems using particular element

Resistive

C365S158000, C365S163000, C365S171000, C365S173000

Reexamination Certificate

active

07463507

ABSTRACT:
The invention relates to a method for operating a memory device, and to a memory device with a plurality of memory cells (1) which each have at least one switching device (13) assigned thereto for controlling, as well as a current supply line and a current discharge line (11, 12), wherein said current supply line (11) and said current discharge line (12) are substantially parallel to each other.

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Bedeschi, F. et al. (2005). “Set and Reset Pulse Characterization in BJT-Selected Phase-Change Memories,”IEEE:1270-1273.

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