Memory device using a common write word line and a common...

Details Memory device using a common write word line and a common... Memory device using a common write word line and a common...

2011-06-14

2011-06-14

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Addressing

Multiple port access

C365S189160, C365S189040, C365S189050

Reexamination Certificate

active

07961547

ABSTRACT:
A one read/two write SRAM circuit of which memory cell size is small, and high-speed operation is possible. The SRAM circuit includes first and second flip-flop circuits which are connected in parallel to a common write word line; a first write control circuit which is connected to said first flip-flop circuit, is conducted by a write control signal supplied to said write word line, and supplies a first write signal to said first flip-flop circuit; and a second write control circuit which is connected to said second flip-flop circuit, is conducted by a write control signal supplied to said write word line, and supplies a second write signal to said second flip-flop circuit.

REFERENCES:
patent: 5355335 (1994-10-01), Katsuno
patent: 5642325 (1997-06-01), Ang
patent: 6044034 (2000-03-01), Katakura
patent: 2002/0036944 (2002-03-01), Fujimoto
patent: 2002/0136053 (2002-09-01), Asano et al.
patent: 2004/0053510 (2004-03-01), Little et al.
patent: 2004/0243758 (2004-12-01), Notani
patent: 2005/0141267 (2005-06-01), Kwon
patent: 2005/0141272 (2005-06-01), Jung
patent: 2005/0162896 (2005-07-01), Jung
patent: 2005/0270885 (2005-12-01), Masuo
patent: 2006/0023503 (2006-02-01), Lee
patent: 63-308783 (1988-12-01), None
patent: 4-64990 (1992-02-01), None
patent: 11-261017 (1999-09-01), None
patent: 2002-163890 (2002-06-01), None
patent: 2003-78036 (2003-03-01), None
patent: 2004-355760 (2004-12-01), None
Niel H.E. Weste, et al., “CMOS VLSI design principle from system point of view”, issued by Maruzen Co., Ltd., pp. 310-311, 1988.
U.S. Appl. No. 12/213,974, filed Jun. 26, 2008, Katsunao Kanari, Fujitsu Limited.
International Search Report mailed Feb. 28, 2006 in connection with the International Application No. PCT/JP2005/023917.
European Search Report issued Apr. 6, 2009 in corresponding European Patent Application 05822758.8.
Korean Office Action issued on Nov. 25, 2009 in corresponding Korean Patent Application 10-2008-7015590.
Japanese Office Action issued on Jul. 27, 2010 in related Japanese Patent Application No. 2007-551831.
Office Action mailed from the United States Patent and Trademark Office on Jan. 20, 2010 in the related U.S. Appl. No. 12/213,974.
Notice of Allowance mailed from the United States Patent and Trademark Office on Jul. 9, 2010, in the related U.S. Appl. No. 12/213,974.
Office Action mailed from the Chinese Patent Office on Aug. 27, 2010 in Chinese patent application No. 2005805243.1.

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