Memory device to detect and compensate for defective memory cell

Details Memory device to detect and compensate for defective memory cell Memory device to detect and compensate for defective memory cell

1994-03-23

1995-12-19

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Bad bit

371 102, 371 212, 371 211, G11C 700

Patent

active

054774926

ABSTRACT:
A memory device includes a redundant data-storage section as a spare for a normal data-storage section so that redundant data-holding circuitry repairs a defective area in normal data-holding circuitry. Data to be written is temporarily stored into a data holding section, and the data thus stored is written into the normal data-storage section and then it is read out immediately after the write operation. If the readout data is different from the initially written data, the destination of the write operation is switched to the redundant data-storage section so that the data held in the data holding section is written into the redundant data-storage section. If there is no discrepancy between these data, the destination of the write operation is then switched to the normal data-storage section so that the data held in the data holding section is written into the normal data-storage section.

REFERENCES:
patent: 4667330 (1987-05-01), Kumagi

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