Memory device that takes leakage currents into account in...

Details Memory device that takes leakage currents into account in... Memory device that takes leakage currents into account in...

2011-08-09

2011-08-09

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S049110, C365S154000, C365S188000, C365S189140, C365S189150, C365S189050, C365S189090, C365S190000, C365S202000, C365S203000, C365S205000, C365S207000, C365S242000

Reexamination Certificate

active

07995413

ABSTRACT:
A memory device is a provided that includes memory cells situated at the intersection of lines and columns, and a dummy path including a first dummy column having two bit lines to which there are connected dummy memory cells, and a circuit adapted to select at least one of the dummy memory cells to discharge one of the dummy bit lines. The dummy path also includes at least one second dummy column adapted to generate a dummy leakage current (representing a leakage current of a column of the memory device selected in read mode), and a circuit adapted to copy the dummy leakage current to the one dummy bit line, so that the discharge of the one dummy bit line also depends on the dummy leakage current.

REFERENCES:
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patent: 2006/0050569 (2006-03-01), Shimizu
patent: 2008/0111616 (2008-05-01), Cheng et al.
patent: 2008/0205176 (2008-08-01), Jetton et al.
patent: 0 805 454 (1997-11-01), None
patent: 2 857 091 (2005-01-01), None
patent: 2 857 149 (2005-01-01), None
International Search Report dated Nov. 29, 2007 for French Patent Application 0702413.

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