Memory device that can be irreversibly programmed electrically

Static information storage and retrieval – Systems using particular element – Capacitors

Reexamination Certificate

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C365S096000, C365S102000

Reexamination Certificate

active

06977836

ABSTRACT:
A non-volatile memory device includes a memory plane formed from a matrix of memory cells, each including an access transistor and a capacitor. The matrix includes first and second groups of cells laid out in a first and second directions. Each first group includes cells whose transistor gates are connected together by a first metallization, whose upper capacitor electrodes are connected together by a second metallization, and whose transistor sources are not connected together. Each second group includes cells whose transistor sources are connected together by a third metallization, whose transistor gates are not connected together, and whose upper capacitor electrodes are not connected together. The device includes control means capable of applying chosen voltages to the first, second, and third metallizations so as to selectively program a single one of the cells by damaging its dielectric without programming the other cells and without damaging the transistors of the cells.

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patent: 5241496 (1993-08-01), Lowrey et al.
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patent: 6310797 (2001-10-01), Muneno
patent: 0 528 417 (1993-02-01), None
Wee et al., “An antifuse EPROM circuitry scheme for field-programmable repair in DRAM” IEEE J. Solid-State Circuits, vol. 35, No. 10, Oct. 2000, pp. 1408-1414.

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