Memory device operable with a plurality of protocols with...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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C710S105000

Reexamination Certificate

active

10643249

ABSTRACT:
An improved memory device is operable in a plurality of protocols. The improved memory device has an interface circuit which receives communication signals from a communication bus. The interface circuit decodes the communication signals and generates a plurality of protocol signals and outputs one of the plurality of protocol signals in response to a select signal. A user selectable nonvolatile memory or fuse stores user selected protocol and generates the select signal corresponding to the user selected protocol. The memory device further comprises a nonvolatile memory and a controller for controlling the nonvolatile memory. The controller is responsive to the one protocol signal that is selected.

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Programmable Microelectronics Corporation; “PMC Two-in-One Firmware Hub/Low Pin Count Flash Memory Achieves Mass Production with Leading Personal Computer and Notebook Manufacturers”; Programmable Microelectronics Corporation; Oct. 28, 2002; available online at www.chingistek.com; all pages.

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