Memory device interface methods, apparatus, and systems

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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C365S051000, C365S189020

Reexamination Certificate

active

07623365

ABSTRACT:
Apparatus and systems may include a substrate, an interface chip disposed on the substrate, a first memory die having a plurality of memory arrays disposed on the interface chip, the first memory die coupled to a plurality of through wafer interconnects (TWI), and a second memory die having a plurality of memory arrays disposed on the first memory die, the second memory die including a plurality of vias, wherein the plurality of vias are configured to allow the plurality of TWI to pass through the second memory die. The second memory die may be coupled to a second plurality of TWI. In this way, the interface chip may be used to communicatively couple the first memory die and the second memory die using the first and second plurality of TWI. Other apparatus, systems, and methods are included.

REFERENCES:
patent: 5347428 (1994-09-01), Carson et al.
patent: 5432729 (1995-07-01), Carson et al.
patent: 5786628 (1998-07-01), Beilstein, Jr. et al.
patent: 5807791 (1998-09-01), Bertin et al.
patent: 5815427 (1998-09-01), Cloud et al.
patent: 5982027 (1999-11-01), Corisis
patent: 6081463 (2000-06-01), Shaffer et al.
patent: 6141744 (2000-10-01), Wing
patent: 6376909 (2002-04-01), Forbes et al.
patent: 6461895 (2002-10-01), Liang et al.
patent: 6600364 (2003-07-01), Liang et al.
patent: 6856009 (2005-02-01), Bolken et al.
patent: 7030317 (2006-04-01), Oman
patent: 7145249 (2006-12-01), Chao et al.
patent: 7279795 (2007-10-01), Periaman et al.
patent: 7301748 (2007-11-01), Anthony et al.
patent: 7464225 (2008-12-01), Tsern
patent: 2003/0197281 (2003-10-01), Farnworth et al.
patent: 2004/0064599 (2004-04-01), Jahnke et al.
patent: 2005/0189639 (2005-09-01), Tanie et al.
patent: 2006/0125069 (2006-06-01), Gabara
patent: 2006/0233012 (2006-10-01), Sekiguchi et al.
patent: 2007/0004240 (2007-01-01), Dibene et al.
patent: 2007/0014168 (2007-01-01), Rajan
patent: 2007/0048994 (2007-03-01), Tuttle
patent: 2007/0070669 (2007-03-01), Tsern
patent: 2007/0102733 (2007-05-01), Zhou et al.
patent: 2007/0120569 (2007-05-01), Sukegawa et al.
patent: 02287847 (1990-11-01), None
patent: WO 2007029253 (2007-03-01), None
patent: WO 2009032153 (2009-03-01), None
“International application serial no. PCT/US2008/010188 search report mailed May 26, 2009”.
“International application serial no. PCT/US2008/010188 Written Opinion mailed May 26, 2009”.
Black, Bryan, et al., “Die Stacking (3D) Microarchitecture”, 6 pages (Oct. 2004).
Bogatin, Eric, “Origami-Style Structure Simplifies Packaging Efficiency”,Semiconductor International, (Feb. 1, 2003), 2 pgs.
Gurnett, K, et al., “A look at the future of stacked die integrated circuits”,Military and Aerospace Electronics, (Apr., 2003), 3 pgs.
Prophet, Graham, “Multi-chip packaging: tall stacks, low profiles”,EDN Europe, (Dec. 5, 2005), 5 pgs.
“Terrazon 3D Stacked Microcontroller with DRAM - FASTACK 3D Super-8051 Micro-controller”, http://www.tezzaron.com/OtherlCS/Super—8051.htm, (Link sent Oct. 2, 2007), 2 pgs.
“Terrazon 3D Stacked DRAM BI-STAR Overview”, http://www.terrazon.com/memory/Overview—3D—DRAM.htm (Link sent Oct. 2, 2007), 1 pg.
“Terrazon FaStack Memory - 3 D Memory Devices”, http://www.terrazon.com/memory/Overview—3D—DRAM.htm (Link sent Oct. 2, 2007 Downloaded Oct. 27, 2007), 3 pgs.
Gann, Keith D., “Neo-stacking technology”,Irvine Sensors Corporation News Release(Mar. 2007), 4 pgs.

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