Memory device having terminals for transferring multiple...

Static information storage and retrieval – Read/write circuit – Signals

Reexamination Certificate

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C365S198000, C365S189030

Reexamination Certificate

active

11382641

ABSTRACT:
A memory device includes a number of terminals for transferring input data and output data to and from a memory array. The memory device includes an auxiliary circuit for receiving input auxiliary information associated with the input data and for generating output auxiliary information associated with the output data. The input and output auxiliary information include inverting codes, parity codes, temperature information or time delay information. The input and output auxiliary information are transferred to and from the memory device on the same terminals that the input data and the output data are transferred.

REFERENCES:
patent: 4566102 (1986-01-01), Hefner
patent: 4794597 (1988-12-01), Ooba et al.
patent: 4888773 (1989-12-01), Arlington et al.
patent: 5058115 (1991-10-01), Blake et al.
patent: 5173905 (1992-12-01), Parkinson et al.
patent: 5228046 (1993-07-01), Blake et al.
patent: 5233614 (1993-08-01), Singh
patent: 5533036 (1996-07-01), Blake et al.
patent: 5682394 (1997-10-01), Blake et al.
patent: 5729497 (1998-03-01), Pawlowski
patent: 5771346 (1998-06-01), Norman et al.
patent: 5864569 (1999-01-01), Roohparvar
patent: 6009548 (1999-12-01), Chen et al.
patent: 6018817 (2000-01-01), Chen et al.
patent: 6044479 (2000-03-01), Dell
patent: 6044483 (2000-03-01), Chen et al.
patent: 6112314 (2000-08-01), Norman et al.
patent: 6141789 (2000-10-01), Cypher
patent: 6178537 (2001-01-01), Roohparvar
patent: 6233716 (2001-05-01), Cypher
patent: 6282686 (2001-08-01), Cypher
patent: 6286077 (2001-09-01), Choi et al.
patent: 6301680 (2001-10-01), Cypher
patent: 6304992 (2001-10-01), Cypher
patent: 6393597 (2002-05-01), Cypher
patent: 6453440 (2002-09-01), Cypher
patent: 6473880 (2002-10-01), Cypher
patent: 6477682 (2002-11-01), Cypher
patent: 6519717 (2003-02-01), Williams et al.
patent: 6567938 (2003-05-01), Wan
patent: 6574768 (2003-06-01), Cypher
patent: 6584595 (2003-06-01), Cypher
patent: 6601191 (2003-07-01), Norman et al.
patent: 6823476 (2004-11-01), Williams et al.
patent: 6838331 (2005-01-01), Klein
patent: 6839875 (2005-01-01), Roohparvar
patent: 6848070 (2005-01-01), Kumar
patent: 6853595 (2005-02-01), Sawamura et al.
patent: 7015826 (2006-03-01), Chan et al.
patent: 7116600 (2006-10-01), Choi
patent: 2002/0013929 (2002-01-01), Maciver
patent: 2002/0188909 (2002-12-01), Chen
patent: 2004/0163027 (2004-08-01), MacLaren et al.
patent: 2004/0163028 (2004-08-01), Olarig
patent: 2004/0168101 (2004-08-01), Kubo
patent: 2005/0028056 (2005-02-01), Tsao et al.
patent: 2005/0028057 (2005-02-01), Briggs
patent: 2005/0165999 (2005-07-01), Choi et al.
patent: 2005/0185442 (2005-08-01), Choi
patent: 2005/0190635 (2005-09-01), Hargan
patent: 2005/0289441 (2005-12-01), Kawagoe et al.
patent: 2006/0198230 (2006-09-01), Choi
patent: 2006/0242495 (2006-10-01), Choi

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