Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2007-05-15
2007-05-15
Hoang, Huan (Department: 2827)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S230030, C365S063000
Reexamination Certificate
active
11227038
ABSTRACT:
First memory chips each have a memory cell as storage means for storing data and do not have a redundant memory cell as redundant storage means for repairing an erroneous bit in the memory cell. Furthermore, a logic minimal in degree is solely provided for operation on a control logic of a second memory chip. The second memory chip has a control logic for effecting memory control of the memory cells, the redundant memory cells, etc. and a redundant memory cell for repairing an error bit of the first memory chips. The memory device is structured by stacking the first and second memory chips.
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Hoang Huan
Morrison & Foerster / LLP
Sharp Kabushiki Kaisha
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