Memory device having redundant memory cell

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S189070, C365S225700, C365S230030

Reexamination Certificate

active

06975548

ABSTRACT:
A semiconductor memory device includes a plurality of memory cell arrays, a plurality of redundant judgment circuits, and a redundant memory cell array. Each of the redundant judgment circuits is used for storing an address of a defective memory cell in the corresponding memory cell array and each of the redundant judgment circuits includes a block judgment unit which outputs a block judgment signal and an address judgment unit which outputs a redundant judgment signal. The block judgment unit outputs the block judgment signal when the corresponding memory cell array includes the defective memory cell. The address judgment unit outputs the redundant judgment signal when the block judgment signal is outputted from the block judgment unit and the address of the defective memory cell matches an external address.

REFERENCES:
patent: 6178127 (2001-01-01), Haraguchi
patent: 6418067 (2002-07-01), Watanabe et al.
patent: 11-168143 (1999-06-01), None
patent: 2001-243789 (2001-09-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Memory device having redundant memory cell does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory device having redundant memory cell, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory device having redundant memory cell will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3470325

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.