Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2000-01-20
2001-06-12
Phan, Trong (Department: 2818)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S145000
Reexamination Certificate
active
06246616
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a memory device where a redundancy cell is included in. More particularly, it relates to a memory device in which a structure of the redundancy file for recording information of replacing to a redundancy cell is formed as the same as that of a normal cell, for example, a defective cell can be replaced into a redundancy cell not only at a wafer stage, but also even after a chip is stored in a package.
2. Description of the Related Art
A memory device, which uses a semiconductor, has a redundancy cell for relieving a defective cell as memory capacity increases. A DRAM used as a cache memory of a computer has a redundancy cell, and stores address information of the defective cell replaced into the redundancy cells in a fuse ROM (redundancy ROM). Then, the DRAM compares a supplied address with the address stored in the redundancy ROM, inhibits an access to a normal cell and permits to access to the redundancy cell, when both addresses are coincident.
On the other hand, a ferroelectric memory using residual polarizing action of a ferroelectric material, which is one of memory devices using a semiconductor therein, has become of major interest lately as a faster rewritable non-volatile memory as the same as a DRAM. The memory cell of FeRAM has also a simple structure formed by a selection transistor and a capacitor as the same as that of the memory cell of DRAM, and therefore, there is quite a possibility to give a large memory capacity in future. As above-described, a dielectric layer of the capacitor is made by a ferroelectric material, which is polarized by applying an electric field of one direction between electrodes of the capacitor so that residual polarization retains, even after the electric field disappears, and data is recorded. Specifically, the FeRAM is a non-volatile memory where stored data can be retained even when the power is not supplied. Moreover, it is expected that the FeRAM can be used as a non-volatile memory having a large memory capacity instead of a DRAM, because the time required for rewriting or erasing data is shorter than that of EEPROM or flash memory widely used nowadays.
Development of the FeRAM has just started, so that a device having such a large memory capacity has not been developed now. Therefore, there is no suggestion relating to a redundancy cell and the structure of replacing a defective cell into the redundancy cell. However, it can be easily estimated that the redundancy cell structure becomes a requisite structure as memory capacity increases in future, and therefore, it is required to suggest the redundancy cell and the replacing structure.
The different point between the FeRAM and the DRAM or the like will be now explained as follows. Firstly, the manufacturing process is not developed so maturely that the redundancy cell structure must be as simple circuitry structure as possible. Secondly, the defective cell detection at the FeRAM occurs not only at a wafer examination but also at a burn-in test (an acceleration test) after a memory chip is encapsulated in a package, and therefore, the defective cell must be replaceable into a redundancy cell even after encapsulating a chip into a package.
Accordingly, if a fused ROM employed in a DRAM, cut by a laser, is used as a redundancy ROM, it is required to form a memory having a different structure from an ordinary cell as a redundancy ROM in a chip. Additionally, the defective cell can be relieved only at a wafer stage, and therefore, the defective cell can not be relieved after storing a chip in a package.
Further, even DRAM, the defective cell detected after storing a chip in a package can not be relieved as long as the redundancy ROM is formed by the currently used fused ROM. Further, in a normal DRAM, it is general that a column including the defective cell is replaced into a redundancy column. In the replacing method, when some defective cells are diversely generated in a chip, there is a limit to the numbers of replaceable redundancy columns, thus that prevents from relieving the defective cells. Therefore, the relieving probability is limited.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a memory device, by which a redundancy cell and a redundancy file memory for recording information of replacing to the redundancy cell can be realized in a simple structure.
It is another object of the present invention to provide a memory device, in which a defective cell can be replaced into a redundancy cell, even after storing a memory chip in a package.
It is further object of the present invention to provide a memory device, by which a probability of relieving a redundancy cell can be increased.
It is furthermore object of the present invention to provide a FeRAM, in which a redundancy cell and a redundancy file memory for recording information of replacing into a redundancy cell can be realized in a simple structure.
It is another object of the present invention to provide a FeRAM, in which a defective cell can be replaced into a redundancy cell, even after storing a memory chip in a package.
It is still other object of the present invention to provide a FeRAM, by which a probability of relieving a redundancy cell can be increased.
To achieve the above described objects, in the present invention, a redundancy file memory for recording a replacing information indicating the defective cell to be replaced into a redundancy cell is formed by a memory cell having the same structure as a normal memory cell, so that it is capable to access to a redundancy file memory at the same time when accessing to a normal memory cell. Then, the replacing information recorded in the redundancy file memory is concurrently read out when accessing to the normal memory cell, and the defective cell is replaced into a redundancy cell according to the replacing information.
With this structure, the structure of the redundancy file memory can be the same as the normal memory cell and the redundancy cell, thus the redundancy circuit structure can be simplified. Additionally, since data can be written in the redundancy file memory, in the same manner of the normal memory cell, it becomes possible to replace the defective cell into a redundancy cell and to record the replacing information, even after storing a memory chip in a package. In other words, even after storing the chip in a package, the defective cell can be relieved. In addition, since the replacing information indicating the defective cell is recorded in a redundancy file memory, it is possible to change the replacing information in each word line, therefore, it also becomes possible to replace the defective cell into a redundancy cell for each defective cell. Therefore, a probability of relieving defective cells with this structure can be increased higher than that when the defective cell is replaced into a redundancy cell in each column or each word.
To achieve the above-described objects, in the present invention, a memory device having a normal memory area and a redundancy memory area, in which a defective cell in the normal memory area can be rewritten into a redundancy cell in the redundancy memory area, includes:
a redundancy file memory, having cells, each of which structure is the same as that in the normal memory area and the redundancy memory area, for recording a replacing information for the cell accessed in the normal memory area, and outputting a signal of the replacing information by being accessed at the same time the normal memory area is accessed, and
a selecting circuit for inhibiting selection of the normal memory area and permitting selection of the redundancy memory area, in response to the signal of the replacing information corresponding to the defective cell.
According to the above invention, since the structure of a redundancy file memory recording the replacing information can be the same as the normal memory cell, there is no need to provide a special extra ROM for redundancy file memory, thus the stru
Nagai Eiichi
Ono Chikai
Arent Fox Kintner & Plotkin & Kahn, PLLC
Fujitsu Limited
Phan Trong
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