Static information storage and retrieval – Read/write circuit
Patent
1989-08-24
1990-11-13
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
36518905, G11C 1300
Patent
active
049706888
ABSTRACT:
A memory device having an operating function includes a memory cell array, a register, and a logical opeation circuit. The memory cell array has memory cells arranged in a matrix form of m rows .times.n columns. Data readout or write-in operation with respect to the memory cell array is effected in the unit of n bits of one row. The register has a bit width corresponding to one row of the memory cell array. Data of one row is read out from the memory cell array and is processed by the logical operation circuit together with data stored in the register. The result of operation is written into a desired row of the memory cell array. The memory cell array, register, and logical operation circuit are formed in the same integrated circuit, thus permitting processing such as picture element processing to be effected inside the integrated circuit, without the need to use an external data bus.
REFERENCES:
patent: 4646270 (1987-02-01), Voss
Kai Naoyuki
Minagawa Tsutomu
Ohhashi Masahide
Uchida Yukimasa
Fears Terrell W.
Kabushiki Kaisha Toshiba
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