Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2007-05-01
2007-05-01
Ellis, Kevin L. (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
Reexamination Certificate
active
11123931
ABSTRACT:
An integrated circuit memory device comprises a memory array to store data, a circuit to output the data at a pin, and a register to store a value that indicates a mode of operation of the integrated circuit memory device. The mode of operation is selected from at least one of a synchronous mode of operation and an asynchronous mode of operation. During the synchronous mode of operation, the circuit outputs the data in response to a transition of an external clock signal. During the asynchronous mode of operation, the circuit outputs the data after a period of time from when a transition of an external control signal is detected.
REFERENCES:
patent: 5594704 (1997-01-01), Konishi et al.
patent: 6026465 (2000-02-01), Mills et al.
patent: 6791898 (2004-09-01), Manapat et al.
patent: 2004/0153602 (2004-08-01), Lovett
patent: 2005/0169091 (2005-08-01), Miki et al.
Barth Richard Maurice
Hampel Craig Edward
Horowitz Mark Alan
Ware Frederick Abbot
Ellis Kevin L.
Rambus Inc.
Vierra Magan Marcus & Deniro LLP
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