Memory device having an adjustable voltage swing setting

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Reexamination Certificate

active

10890972

ABSTRACT:
A method of operating an integrated circuit including an output driver. The method includes storing a value in a register, wherein the value is representative of a voltage swing setting of an output driver. The voltage swing setting of the output driver is adjusted using a counter that holds a count value representing an update to the voltage swing setting. The count value is updated in accordance with a signal that indicates an adjustment to the voltage swing setting. In addition, an integrated circuit memory device comprising an output driver, a register and a counter is provided. The counter updates a count value in response to a signal that indicates a direction to adjust the count value.

REFERENCES:
patent: 3646329 (1972-02-01), Yoshino et al.
patent: 4192005 (1980-03-01), Kurtz
patent: 4315210 (1982-02-01), Michel et al.
patent: 4329600 (1982-05-01), Stewart
patent: 4414480 (1983-11-01), Zasio
patent: 4481625 (1984-11-01), Roberts et al.
patent: 4549124 (1985-10-01), Beier
patent: 4680487 (1987-07-01), Kobayashi
patent: 4691127 (1987-09-01), Huizer
patent: 4707620 (1987-11-01), Sullivan et al.
patent: 4715003 (1987-12-01), Keller et al.
patent: 4719369 (1988-01-01), Asano et al.
patent: 4728881 (1988-03-01), Evans et al.
patent: 4765188 (1988-08-01), Krechmery et al.
patent: 4779013 (1988-10-01), Tanaka
patent: 4859877 (1989-08-01), Cooperman et al.
patent: 4860198 (1989-08-01), Takemaka
patent: 4894562 (1990-01-01), Cavaliere et al.
patent: 4939389 (1990-07-01), Cox et al.
patent: 4958520 (1990-09-01), Trommler et al.
patent: 4967105 (1990-10-01), Akamatsu et al.
patent: 4977333 (1990-12-01), Suzuki et al.
patent: 4992724 (1991-02-01), Hisanaga et al.
patent: 5023488 (1991-06-01), Gunning et al.
patent: 5024101 (1991-06-01), Tanaka et al.
patent: 5045730 (1991-09-01), Cooperman et al.
patent: 5045832 (1991-09-01), Tam
patent: 5055715 (1991-10-01), Inaba
patent: 5075569 (1991-12-01), Branson
patent: 5081379 (1992-01-01), Korteling
patent: 5097148 (1992-03-01), Gabara
patent: 5107230 (1992-04-01), King
patent: 5117130 (1992-05-01), Shoji
patent: 5118971 (1992-06-01), Schenck
patent: 5121064 (1992-06-01), Eller
patent: 5134311 (1992-07-01), Biber et al.
patent: 5165046 (1992-11-01), Hesson
patent: 5185538 (1993-02-01), Kondoh et al.
patent: 5194765 (1993-03-01), Dunlop et al.
patent: 5206546 (1993-04-01), Usami
patent: 5237214 (1993-08-01), Usami
patent: 5254883 (1993-10-01), Horowitz et al.
patent: 5296756 (1994-03-01), Patel et al.
patent: 5387824 (1995-02-01), Michelsen
patent: 5457407 (1995-10-01), Shu et al.
patent: 5546042 (1996-08-01), Tedrow et al.
patent: 5568068 (1996-10-01), Ota et al.
patent: 5578940 (1996-11-01), Dillon et al.
patent: 5596285 (1997-01-01), Marbot et al.
patent: 5778419 (1998-07-01), Hansen et al.
patent: 5838177 (1998-11-01), Keeth
patent: 5977797 (1999-11-01), Gasparik
patent: 6009487 (1999-12-01), Davis et al.
patent: 6072747 (2000-06-01), Yoon
patent: 6094075 (2000-07-01), Garrett, Jr. et al.
patent: 6442644 (2002-08-01), Gustavson et al.
patent: 0482392 (1991-02-01), None
patent: 63-276935 (1988-11-01), None
patent: 03-087907 (1991-04-01), None
patent: 04-117709 (1992-04-01), None
Reynolds, C.B., “Analysis and Guidelines for High-Speed VLSI System Interconnections,” IEEE 1988 Custom Integrated Circuits Conference, pp. 23.5.1-23.5.4.
Leung, Kam, “Controlled Slew Rate Output Buffer,” IEEE 1988 Custom Integrated Circuits Conference, pp. 5.5.1-5.5.4.
Knight, Thomas F. Jr., and Krymm, Alexander, “A Self-Terminating Low-Voltage Swing CMOS Output Driver,” Journal of Solid State Circuits, vol. 23, No. 2, Apr. 1998, pp. 457-464.
Cox, Dennis T., et al., “VLSI Performance Compensation for Off-Chip Drivers and Clock Generation,” IEEE 1989 Custom Integrated Circuits Conf., pp. 14.3.1-14.3.4.
Douseki, Takakuni and Ohmori, Yasuo, “BiCMOS Circuit Technology for a High-Speed SRAM,” IEEE Journal of Solid-State Circuits, vol. 23, No. 1, Feb. 1988, pp. 68-73.
“Driver with Noise-Dependent Switching Speed Control,” IBM Technical Disclosure Bulletin, vol. 29, No. 3, Aug. 1986, IBM Corporation, pp. 1243-1244.
Biber, Alice I. “The Design of an Application Specific Interface Drive for a High Capacitive Load,” Masters Thesis at the Massachusetts Inst. of Technology, Dec. 1989.
Raver, Norman, “Open-Loop Gain Limitations for Push-Pull Off-Chip Drivers,” Journal of Solid-State Circuits, vol. SC-22, No. 2, Apr. 1987, pp. 145-150.
Senbon, T. and Hanabuchi, F., Instrumentation Systems: Fundamentals and Applications, Chapter 3: Detection and Conversion of Industrial Variables; 1991, 11 pages.
Johnson, C. and Richeh, H, “Highly Accurate Resistance Deviation to Frequency Converter with Programmable Sensitivity and Resolution,” IEEE vol. IM-35, No. 2, Jun. 1986, 4 pages.
Sasaki, H., et al., “High Precision Automated Resistance Measurement Using A Modified Wheatstone Bridge,” CPEM '88 Digest, Japan, 1988, 1 page.
Sasaki, H., et al., “Measurement of the Pressure Dependence of Standard Resistors Using A Modified Wheatstone Bridge,” Trans. IEE of Japan, vol. 109, No. 1/2,Jan./Feb. 1989, 6 pages.
Sasaki, H., et al., “Automated Measurement System for 1-.OMEGA.Standard Resistors Using A Modified Wheatstone Bridge,” IEEE Trans. on Instr. and Measurement, vol. 40, No. 2, Apr. '91, p. 274-277.
Sasaki, H., et al., “A Modified Wheatstone Bridge for High-Precision Automated Resistance Measurement,” IEEE Trans. on Instr. and Measurement, vol. 26, No. 2, Dec. 1987, p. 947-949.
Armstrong, David H., “Pitfalls in Testing Digital ASIC Devices,” IEEE 1987 Custom Integrated Circuits Conference, pp. 573-578.
Mathews, John W. and Erdelyi, Charles K. “Power Supply Votages for Future VLSI,” IEEE 1986 Custom Integrated Circuits Conference, pp. 149-152.
Gillingham, Peter, MOSAID Technologies, Inc., “SLDRAM Architectural and Functional Overview”, 1997 SLDRAM Consortium, Aug. 29, 1997, pp. 1-14.
Gillingham, Peter, and Vogley, Bill, “SLDRAM” High-Performance, Open-Standard Memory, 1997 IEEE, Nov./Dec. 1997, pp. 29-39.
Draft 0.99 IEEE P1596.7-199X, “Draft Standard for A High-Speed Memory Interface (SyncLink)”, Oct. 14, 1996 IEEE.
Gabara et al., “Digitally Adjustable Resistors in CMOS for High-Performance Applications”, IEEE Journal of Solid-State Circuits, vol. 27, No. 8, Aug. 1992.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Memory device having an adjustable voltage swing setting does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory device having an adjustable voltage swing setting, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory device having an adjustable voltage swing setting will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3731241

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.