Memory device having a crested tunnel barrier

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257324, 438263, 438264, H01L 29288, H01L 29292, H01L 21336

Patent

active

061216542

ABSTRACT:
A nonvolatile, high-speed, bit-addressable memory device is disclosed. A tunnel barrier layer is disposed between a charge supply medium and a charge storage medium, with the tunnel barrier layer having a crested energy profile with a maximum half-way between the charge storage layer and the charge supply layer.

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patent: 5640345 (1997-06-01), Okuda et al.
patent: 5783475 (1998-07-01), Ramaswami
DiMaria, D.J., "Graded or stepped energy band-gap-insulator MIS structure (GI-MIS or SI-MIS)", J. Appl. Phys., Vo. 50, No. 9, pp. 5826-5829, Sep. 1979.

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