Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Patent
1996-05-31
1997-03-11
Clawson, Jr., Joseph E.
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
365194, 365226, 36523006, G11C 700
Patent
active
056108630
ABSTRACT:
This invention relates to a memory device internally employing an active period control signal for controlling an active period and an inactive period for internal operation. The memory device comprises a plurality of word lines and bit lines; memory cells provided at intersections thereof; a booster circuit, having an output terminal, for outputting to the output terminal a higher voltage than a power source voltage; and word drivers, connected to each of the word lines, for connecting the output terminal of the booster circuit to a corresponding word line in response to a word selection signals provided during the active period. The memory device also comprises a boosting control signal generation circuit supplying the booster circuit with a boosting control signal to continue a boosting operation of the booster circuit longer than the active period in response to the active period control signal. The output of the booster circuit can recover appropriate voltage level after the termination of the active period so that the error read operation can be avoided.
REFERENCES:
patent: 4673829 (1987-06-01), Gupta
Clawson Jr. Joseph E.
Fujitsu Limited
LandOfFree
Memory device having a booster circuit and a booster circuit con does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory device having a booster circuit and a booster circuit con, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory device having a booster circuit and a booster circuit con will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-448998