Memory device for performing a refresh operation under an active

Static information storage and retrieval – Read/write circuit – Data refresh

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36523003, G11C 700, G11C 800

Patent

active

058810110

ABSTRACT:
A memory device does not operate an input/output sense-amplifier corresponding to a row to be refreshed, thus prevents a data mixing between a row of an active state and another row to be refreshed, thereby performing a refresh operation under an active mode. In addition, if the block of a row to be refreshed is not identical with other block of a row placed at an active state, the memory device performs a refresh operation under an active mode, thereby increasing an effective bandwidth of DRAM.

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patent: 5253211 (1993-10-01), Suzuki
patent: 5343430 (1994-08-01), Furuyama
patent: 5347491 (1994-09-01), Kagami
patent: 5566118 (1996-10-01), Shimizu
patent: 5590081 (1996-12-01), Shimizu

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