Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2008-03-04
2008-03-04
Elms, Richard T. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S201000, C365S210130
Reexamination Certificate
active
07339844
ABSTRACT:
A method and apparatus for filtering failures due to must-repair rows or columns from a memory test fail summary image includes current available redundant row failure counts respectively associated with rows of a memory device and current available redundant column failure counts associated with columns of the device. Respective failure counts are preloaded with the respective values of redundant rows and columns available for repairing the device. When failures in memory cells of the device are encountered, either during test, or during scan of an earlier generated error image, the row and column failure counts associated with the rows and columns containing the memory cell failures are decremented. At the end of a test, the value of the failure counts indicates whether the corresponding row or column contain any failures at all, whether the corresponding row or column is designated as a “must-repair” row or column, and otherwise how many errors the corresponding row or column contain.
REFERENCES:
patent: 6667918 (2003-12-01), Leader et al.
patent: 7055074 (2006-05-01), Hughes et al.
Freeseman John M.
Jordan Stephen D.
Krech, Jr. Alan S.
Elms Richard T.
Nguyen Dang
Verigy (Singapore Pte. Ltd.
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