Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate
2003-01-27
2004-01-20
Le, Vu A. (Department: 2818)
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
C365S042000, C365S202000
Reexamination Certificate
active
06680870
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a memory device in which a nonvolatile memory chip is plurally provided to be separately controllable but sharing the same data line, and a method and program for data processing in the memory device.
2. Description of the Related Art
A memory device having nonvolatile memory applied therein allows data rewriting, and requires no battery backup. Here, the nonvolatile memory is exemplified by flash memory. Due to its high portability, the flash memory has recently become popular for memory devices in portable devices, which handle music data, video data or the like. Not only having built-in flash memory, digital cameras, audio players, and PDAs also mostly include a slot for a removable memory card exemplified by an SD card. The slot is used for data exchange between devices or capacity selection of a flash memory. As the application range is extended, the demand has been growing for the flash memory to be larger in capacity and faster in access speed.
As to the access speed of the flash memory, carrying out a save process causes speed reduction. The save process is for saving any needed data before deleted. When receiving a request for data writing, a flash memory device determines whether data is already carried by a physical page, of pages each being a writing unit, corresponding to a logic address accompanying the request or not. The flash memory does not allow overwriting. Accordingly, in a case where the corresponding page is already carrying data, data writing is executed to any writable block of physical blocks each being a data deletion unit other than the block including the page. If this is the case, the data which has been previously included is deleted due to newly written data. The issue here is that, if one block includes a plurality of pages, data deletion is executed not only to the page requested in logic address for data writing but also to any other pages included in the same block. This often happens if the flash memory is large in capacity because of the high need for a physical block therein including a plurality of pages. As a result, in a specific block, not only data in a page requested for data writing, data in other pages is also deleted with no choice. The save process is carried out for saving such needed data before deleted.
In such a save process, usually, data saving is temporarily done to a buffer after data reading. Here, data to be read is, in a block including a page requested for data writing, the one written in pages not requested for data writing. After data saving is done, the data in the block including the page requested for data writing is all deleted. Then, to the pages in the block carrying no data after deletion, written is the data once saved exemplarily in the buffer and data coming from an external data input/output device. By going through such a save process, data protection is successfully applied to data in pages not requested for data writing in a block including a requested page.
The problem of the save process is that the writing speed is reduced thereby. For betterment, in the memory device disclosed in Japanese Patent Laid-Open Publication No. 1999-203885, no buffer saving is done to data, in a block including a page requested for data writing, included in pages not requested for data writing.
This memory device is plurally provided with a semiconductor memory chip. Data inputted from any external data input/output device and data read for data saving is written to a block carrying no data after data deletion in the semiconductor memory chip. Here, the semiconductor memory chip is the one not including a block having a page requested for data writing.
The issue here is that the flash memory possibly causes data error at the time of data reading, and this is not neglectable. Therefore, not only in the save process, data transfer between the flash memory chips as disclosed may also result in erroneous data writing.
Further, a program error may occur during data writing. If it occurs at the time of data writing for data transfer between the flash memory chips, the data has to be read again from the corresponding flash memory chip. Such rereading from the flash memory chip requires a considerable amount of power consumption, and takes a long time.
What is more, at the time of data move between the flash memory chips, if power is shut down before data deletion from one flash memory chip being a data source, there is no clue which flash memory chip carries the newer data when the power is turned on.
As such, even with data transfer between nonvolatile memory chips aimed to avoid reducing the access speed, problems resulted from the characteristics of the nonvolatile memory chips still come up.
SUMMARY OF THE INVENTION
The present invention has proposed in consideration of the above conventional problems, and an object thereof is to provide a memory device free from such problems associated with data transfer between nonvolatile memory chips.
The present invention is adopting the following unit to achieve the above object.
In the memory device of the present invention, a nonvolatile memory chip is plurally provided to be separately controllable but sharing the same data line. In this memory device, an error correction code process unit generates an error correction code, which is written to the nonvolatile memory chip together with the corresponding data. To detect if there is any error in the data read to the data line from the nonvolatile memory chip, the error correction code process unit refers to the error correction code attached to the data. If detected any, the error is accordingly corrected.
Here, when the data read to the data line is written to any one of the nonvolatile memory chips different from the one from which the data is read, if the data is detected as containing a correctable error, the writing unit performs data writing after the error is corrected.
In this manner, even if the read data contains any error, the error never fails to be detected before data writing.
Further, if the memory device is provided with a buffer for temporary data storage, even if the data contains any correctable error, the error correction code process unit can apply error correction to data stored into the buffer from the data line.
As a result, there is no more need to access the corresponding nonvolatile memory chip for error correction.
The management information process unit generates management information, which is to be written with the corresponding data for management thereof. Not only to any incoming data, the management information is also generated to data read to the data line and then written to a nonvolatile memory chip different from the one from which the data is read.
The writing unit performs data writing to the nonvolatile memory chip after addition of the resulting management information.
In this manner, at the time of data move between nonvolatile memory chips, even if power is shut down before data deletion in a data source, there is a clue which flash memory chip carries the newer data when the power is turned on.
If the memory device is provided with a buffer, the writing unit can use the data stored into the buffer from the data line if any program error occurs to the data read to the data line and then transferred to a nonvolatile memory chip different from the one from which the data is read. As to the data stored in the buffer, the writing unit simply writes the data as it is.
Accordingly, as to the data stored in the buffer, there is no more need for rereading from the corresponding nonvolatile memory chip, successfully leading to less power consumption and shorter time for data reading.
In the memory device, the above described error correction code process unit, the management information process unit, and the buffer may be used in combination with the writing unit.
If so, when the data contains any uncorrectable error, the management information process unit provides the management information of the data with
Sekibe Tsutomu
Toyama Masayuki
Le Vu A.
McDermott & Will & Emery
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