Memory device and semiconductor device

Static information storage and retrieval – Systems using particular element – Flip-flop

Reexamination Certificate

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C365S145000

Reexamination Certificate

active

11287059

ABSTRACT:
A memory circuit includes a latch circuit having a first inverter and a second inverter, a first ferroelectric capacitor that gives a first capacitance to a power supply terminal of the first inverter, a second ferroelectric capacitor that gives a second capacitance different from the first capacitance to a power supply terminal of the second inverter, and a voltage source that starts supplying a drive voltage for driving the latch circuit to the power supply terminal of the first inverter to which the first capacitance is given and the power supply terminal of the second inverter to which the second capacitance is given.

REFERENCES:
patent: 6512687 (2003-01-01), Chen et al.
patent: 6646909 (2003-11-01), Miwa et al.
patent: 6707702 (2004-03-01), Komatsuzaki
patent: 6836428 (2004-12-01), Nakura et al.
patent: 6996000 (2006-02-01), Chen et al.
patent: 64-066899 (1989-03-01), None

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