Memory device and methods thereof

Details Memory device and methods thereof Memory device and methods thereof

2008-10-15

2011-11-22

Nguyen, Dang (Department: 2824)

Static information storage and retrieval

Read/write circuit

Including signal comparison

C365S191000, C365S185030

Reexamination Certificate

active

08064273

ABSTRACT:
A memory device is disclosed that includes multiple bit cells, whereby each bit cell is capable of being programmed to more than two states. A value stored at the memory device is determined by comparing the information stored at three or more of the bit cells. In an embodiment, the bit cell includes a silicon-on-insulator (SOI) metal oxide semiconductor field effect transistor (FET) device, and the information stored at the bit cell can be represented by a corresponding level of charge stored in the body of the device.

REFERENCES:
patent: 4868823 (1989-09-01), White et al.
patent: 5523970 (1996-06-01), Riggio, Jr.
patent: 5933366 (1999-08-01), Yoshikawa
patent: 6005793 (1999-12-01), Tran
patent: 6069821 (2000-05-01), Jun et al.

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