Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate
2007-07-10
2007-07-10
Hoang, Huan (Department: 2827)
Static information storage and retrieval
Addressing
Multiple port access
C365S189040
Reexamination Certificate
active
11044740
ABSTRACT:
According to one aspect of the invention, a circuit for accessing data in a memory is disclosed. The circuit generally comprises a first port having a read logic circuit and a first output which generates data from the memory. A second port has a read logic circuit and a write logic circuit. A second output is coupled to the second port, and also generates data from the memory. Circuits for separately selecting read and write widths for a port of a memory, such as a random access memory, are disclosed. Finally, other embodiments related to implementing a content addressable memory in a programmable logic device are disclosed. Further, a method of accessing data in a memory is disclosed.
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Jean-Louis Brelet et al.; “Using Virtex-II Block RAM for High Performance Read/Write CAMs”; XAPP260 (v1.1) Feb. 27, 2002; available from www.xillnx.com; pp. 1-12.
Ching Alvin Y.
Pang Raymond C.
Pham Thanh
Young Steven P.
Chanroo Keith A.
Hoang Huan
King John J.
Xilinx , Inc.
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