Memory device and method of transferring data in memory device

Static information storage and retrieval – Addressing – Multiple port access

Reexamination Certificate

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C365S189040

Reexamination Certificate

active

11044740

ABSTRACT:
According to one aspect of the invention, a circuit for accessing data in a memory is disclosed. The circuit generally comprises a first port having a read logic circuit and a first output which generates data from the memory. A second port has a read logic circuit and a write logic circuit. A second output is coupled to the second port, and also generates data from the memory. Circuits for separately selecting read and write widths for a port of a memory, such as a random access memory, are disclosed. Finally, other embodiments related to implementing a content addressable memory in a programmable logic device are disclosed. Further, a method of accessing data in a memory is disclosed.

REFERENCES:
patent: 5289432 (1994-02-01), Dhong et al.
patent: 6346825 (2002-02-01), Pang et al.
patent: 6373779 (2002-04-01), Pange et al.
patent: 6986004 (2006-01-01), Cheng et al.
Jean-Louis Brelet et al.; “Using Virtex-II Block RAM for High Performance Read/Write CAMs”; XAPP260 (v1.1) Feb. 27, 2002; available from www.xillnx.com; pp. 1-12.

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