Memory device and method of controlling the same

Details Memory device and method of controlling the same Memory device and method of controlling the same

1997-07-23

1999-02-02

Nelms, David

Static information storage and retrieval

Read/write circuit

Simultaneous operations

36518907, 36523005, G11C 1604

Patent

active

058674314

ABSTRACT:
A memory device comprises a differential circuit for outputting a signal corresponding to the difference in value between an input read address signal and an input write address signal, a determination circuit for outputting a decision signal responsive to the output of the differential circuit and an address generating circuit for outputting a generated write address and a generated read address having a given or greater difference in signal value therebetween, based on the input read address signal, the input write address signal and the decision signal.

REFERENCES:
patent: 5436863 (1995-07-01), Kogure

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