Memory device and method for transforming between...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185030, C365S185220

Reexamination Certificate

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07420841

ABSTRACT:
A memory device and a method of operating a memory device is disclosed. In one embodiment of the invention, the memory device includes a plurality of multi-level memory cells each having a number m of levels not matching 2nwith n being a non-zero integer, and a circuit or device for combining the levels of at least two of the memory cells for write and read operations into a set of combined states and for transforming at least a subset of 2ncombinations of the set of combined states into n two-level data bits.

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patent: 2002/0054505 (2002-05-01), Micheloni et al.
patent: 2007/0171697 (2007-07-01), Hoenigschmid et al.
patent: 2007/0206402 (2007-09-01), Liaw et al.
patent: WO 0157876 (2001-08-01), None

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