Memory device and method for fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE27088

Reexamination Certificate

active

07045846

ABSTRACT:
Disclosed are a memory device and a method for fabricating the same. The memory device includes: a substrate provided with a trench; a bit line contact junction formed beneath the trench; a plurality of storage node contact junctions formed outside the trench; and a plurality of gate structures each being formed on the substrate disposed between the bit line contact junction and one of the storage node contact junctions. Each sidewall of the trench becomes a part of the individual channels and thus, channel lengths of the transistors in the cell region become elongated. Accordingly, the storage node contact junctions have a decreased level of leakage currents, thereby increasing data retention time.

REFERENCES:
patent: 5040036 (1991-08-01), Hazani
patent: 5162247 (1992-11-01), Hazani
patent: 5477071 (1995-12-01), Hamamoto et al.
patent: 6048767 (2000-04-01), Terada
patent: 6297143 (2001-10-01), Foote et al.
patent: 6472696 (2002-10-01), Zimmermann et al.
patent: 6617633 (2003-09-01), Huang
patent: 2003/0122171 (2003-07-01), Huang

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