Memory device and memory programming method

Static information storage and retrieval – Floating gate – Multiple values

Reexamination Certificate

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C365S185240

Reexamination Certificate

active

07864574

ABSTRACT:
Provided are memory devices and memory programming methods. A memory device may include a multi-bit cell array including a plurality of multi-bit cells, a programming unit configured to program a first data page in the plurality of multi-bit cells and to program a second data page in the multi-bit cells with the programmed first data page, a first controller configured to divide the multi-bit cells with the programmed first data page into a first group and a second group, and a second controller configured to set a target threshold voltage interval of each of the multi-bit cells included in the first group based on first read voltage levels and the second data page, and to set a target threshold voltage interval of each of the multi-bit cells included in the second group based on second read threshold voltage levels and the second data page.

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International Search Report dated Apr. 30, 2010 for corresponding PCT Application No. PCT/KR2009/002487.

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