Memory device and internal control method therefor

Details Memory device and internal control method therefor Memory device and internal control method therefor

2006-11-07

2006-11-07

Peugh, Brian R. (Department: 2187)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S219000, C711S214000

Reexamination Certificate

active

07133996

ABSTRACT:
A memory device for ensuring efficient access and reduction in current consumption. The memory device includes a plurality of memory cells arranged in accordance with a first address and a second address which define a logical address map indicating a logical shape of the memory array. An address map changing unit is operatively coupled to the memory array, for receiving a first address signal for generating the first address and a second address signal for generating the second address. The address map changing unit is capable of changing the logical address map by altering a part of one of the first address signal and the second address signal.

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