Memory device

Details Memory device Memory device

2005-11-29

2005-11-29

Dinh, Son T. (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S230030, C365S233100

Reexamination Certificate

active

06970369

ABSTRACT:
In a memory device having a controller and multiple memory modules both of which are mounted together on a motherboard, a high-speed operation is executed by suppressing waveform distortion caused by signal reflection. Since signal reflection occurs when a controller performs the writing/reading of data relative to memory units on memory modules, active terminator units are included in the controller and the memory units. These active terminator units are provided for a data bus and/or a clock bus in order to terminate these buses in memory units. The active terminator units provided for the controller and the memory units may be put into an inactive state when data is to be received.

REFERENCES:
patent: 6125419 (2000-09-01), Umemura et al.
patent: 6308232 (2001-10-01), Gasbarro
patent: 6370053 (2002-04-01), Chang et al.
patent: 6538951 (2003-03-01), Janzen et al.
patent: 6690612 (2004-02-01), Gall et al.
patent: 4-50933 (1992-04-01), None
patent: 07-135513 (1995-05-01), None
patent: 07-182078 (1995-07-01), None
patent: 07-240680 (1995-09-01), None
patent: 11-083545 (1999-03-01), None
patent: 11-317489 (1999-11-01), None
patent: 11-353228 (1999-12-01), None
patent: 2001-257018 (2001-09-01), None
patent: 2002-032164 (2002-01-01), None
patent: 2002-271108 (2002-09-01), None
patent: 2003-068082 (2003-03-01), None

Affiliated with

Also associated with

Rating

Memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3522010