Memory device

Details Memory device Memory device

2000-11-13

2001-11-06

Nguyen, Tan T. (Department: 2818)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S230060

Reexamination Certificate

active

06314031

ABSTRACT:

BACKGROUND OF THE INVENTION
Field of the Invention
The invention lies in the field of memory device technology. More specifically, the invention relates to a memory device having a multiplicity of memory cells for storing data, having at least one comparison unit, which can check whether an address applied to the memory device has an associated memory cell which cannot be written to or read from properly or is in a memory cell area containing memory cells which cannot be written to or read from properly, and having a selection device which, when required, ensures that backup memory cells or backup memory cell areas are used instead of memory cells or memory cell areas which cannot be written to or read from properly.
A memory device of this type is shown schematically in FIG.
2
. It will be understood by those of skill in the pertinent art that the figure illustrates only those component parts of the memory device which are of particular interest in the present case.
The memory device is denoted by the reference symbol S in FIG.
2
.
In the example under consideration, the memory device S is designed to store 16 Mbits of data, and therefore has at least 16 M memory cells. In the example under consideration, the memory cells present are distributed over 16 memory blocks SB
1
to SB
16
of identical size, that is to say in memory blocks each designed to store 1 Mbit of data. The memory blocks SB
1
to SB
16
are in turn distributed over four memory banks SBankA, SBankB, SBankC and SbankD. The memory banks have identical sizes.
In the example under consideration, the memory cells in each memory block are arranged in a memory cell matrix comprising 512 rows and 2048 columns, that is to say they can be addressed via 512 word lines and 2048 bit lines. The measures specifically to be taken in order to write to or read from selected memory cells are known to those of skill in the pertinent art and require no more detailed explanation.
The memory cells to be written to or read from in each case are determined by an address which is applied to the memory device, or more precisely which is applied to connections A
1
to An thereof; the data which are to be written to the memory cells concerned or which are to be read from the memory cells concerned are applied to connections D
1
to Dm of the memory device or are provided for collection on these connections.
The memory device under consideration has more than the 16 M memory cells required to store 16 Mbits of data. This is done for redundancy purposes, so that memory cells or memory cell areas which cannot be written to or read from properly can be replaced by other memory cells or memory cell areas.
The memory cells or memory cell areas which cannot be written to or read from properly, or more precisely the addresses associated with these memory cells or memory cell areas, are ascertained in a test on the memory device and are recorded in the memory device, for example using so-called fuses F.
In normal operation of the memory device, comparison units VE compare the addresses applied to the memory device via the latter's connections A
1
to An with the addresses recorded in the memory device for the memory cells or memory cell areas which cannot be written to or read from properly. If such a comparison produces a match, then this is signaled to a selection device AE, and the latter ensures that data which is to be written to the memory device is not, for example, written to the memory cells denoted by the address applied to the memory device, but rather to (backup) memory cells associated with the unusable memory cells, and that data which is to be read from the memory device is not, for example, read from the memory cells denoted by the address applied to the memory device, but rather from the (backup) memory cells associated with the unusable memory cells.
In the manner described, memory devices in which not all the memory cells can be written to and read from properly can be used as fully operational memory devices; the user of the memory device is unaware that particular memory cells or memory cell areas are being replaced by backup memory cells or backup memory cell areas.
However, the check to determine whether the memory cells or memory cell areas which are currently to be written to or read from need to be replaced with backup memory cells or backup memory cell areas and the replacement of the unusable memory cells or memory cell areas are associated with a not inconsiderable level of complexity and/or limit or reduce the speed at which data can be written to the memory device or can be read therefrom.
SUMMARY OF THE INVENTION
The object of the invention is to provide a memory device which overcomes the above-noted deficiencies and disadvantages of the prior art devices and methods of this kind, and in which access operations on memory cells or memory cell areas which cannot be written to or read from properly can be detected and these memory cells or memory cell areas can be replaced as quickly as possible and with a minimum level of complexity.
With the above and other objects in view there is provided, in accordance with the invention, a memory device, comprising:
a multiplicity of memory cells for storing data;
at least one comparison unit having an address input and being configured to check whether an address received at the address input has a memory cell associated therewith which cannot be written to or read from properly or is in a memory cell area containing memory cells which cannot be written to or read from properly; and
a selection device connected to the comparison unit, the selection device being configured to ensure that backup memory cells or backup memory cell areas are used instead of memory cells or memory cell areas which cannot be written to or read from properly;
wherein information about a location of the memory cells or memory cell areas which are not to be used is supplied to the selection device at an instant at which a determination has not yet been made that the address received at the address input has a memory cell associated therewith which cannot be written to or read from properly or is in a memory cell area containing memory cells which cannot be written to or read from properly.
With the above and other objects in view there is also provided, in accordance with the invention, a related memory device in which information about the location of the memory cells or memory cell areas which are not to be used is actually supplied to the selection device before an instant at which the selection device is prompted to ensure that backup memory cells or backup memory cell areas are used instead of memory cells or memory cell areas which cannot be written to or read from properly.
In accordance with an added feature of the invention, the selection device only ensures that backup memory cells or backup memory cell areas are used instead of memory cells or memory cell areas which cannot be written to or read from properly if it has previously been prompted to do so, and the prompt signal is issued only when it has been determined that the address applied to the memory device has an associated memory cell which cannot be written to or read from properly or is in a memory cell area containing memory cells which can not be written to or read from properly.
In accordance with an additional feature of the invention, the at least one comparison unit is configured to carry out a plurality of comparison operations, and wherein a circumstance of whether an address applied to the memory device has an associated memory cell which cannot be written to or read from properly or is in a memory cell area containing memory cells which cannot be written to or read from properly is determined only when all comparison results are present.
In accordance with a concomitant feature of the invention, the selection device receives information about the location of the memory cells or memory cell areas which are not to be used as soon as one or more comparison results mean that it is no longer possible to rule out that th

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