Memory device

Details Memory device Memory device

1997-09-26

2001-10-09

Yoo, Do Hyun (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S143000, C711S113000

Reexamination Certificate

active

06301635

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a memory device and method of operation therefor. In particular, but not exclusively, the present invention relates to memory devices known as flash memory.
BACKGROUND OF INVENTION
Semiconductor or solid state memory devices comprise electrical signals or charges arranged to be representative of the data which is desired to be stored in the memory device. Memory devices which require power to be supplied to them in order that the electrical signals can be maintained, sometimes referred to as being refreshed, are known as volatile memories. Memory devices not requiring power to maintain the electrical signals are known as non-volatile memories. An early type of non-volatile memory is known as a Read Only Memory (ROM), in which the electrical signals or charges representative of data were created at the time of manufacturing the ROM and then the data represented by the electrical signals was read back when the device was in operation. The facility for a user to program a ROM and electrically erase data stored on the device and replace it with other data is possible with Electrically Erasable Programmable Read Only Memories (EEPROMs). Programming an EEPROMs is relatively slow since input/output of data and addressing is in a serial format. Additionally, special “high” voltages are required when programming the EEPROM. However, EEPROMs are particularly useful in portable electronic apparatus where user or system parameters are altered during use of the portable apparatus, and need to be stored when the apparatus is powered down for future use next time the portable apparatus is operating. Such a portable apparatus may be a radio telephone for example, where the parameters are for call counters/timers, last call stack, user settings for the user interface and user name and number memory for example. Such use may be referred to as a “write once/read many” type of application where the relative slowness during use and high power consumption during reprogramming does not mitigate against the use of EEPROMs for portable battery powered apparatus.
However, EEPROMs are typically only available in relatively small memory sizes such as 8 Kbyte or 16 Kbyte sizes, before they become prohibitively expensive. As more and more non-volatile memory space is required at lower power consumption for portable electronic apparatus, alternatives to EEPROM are required, Such an alternative is so-called Flash Memory which is available with large storage densities, for example 16 and 32 Mbit devices are commercially available. Flash memory is faster than EEPROM since it uses a parallel addressing and data format. Additionally, it has lower stand-by power consumption than EEPROM. Flash memory erases in blocks which are groups of bytes usually in multiples of 4K, 8K, 16K and so-forth. Erasing a block at a time usually makes reprogramming Flash Memory faster than reprogramming EEPROM, which is the origin of the term “flash”. Nevertheless, a block erase takes a relatively long time, typically 0.5 seconds for an 8 Kbyte block.
The feature of block only erase has resulted in Flash Memory being used to store “linked list” data structures. Such a structure is described in Intel Corporation Application Note AP-604 for their Smart Voltage Boot Block Flash Memory Family. In these Flash Memory devices two so-called parameter blocks are provided for storing data that will change. Only one of the parameter blocks is in use at any one time. Each data record comprises a parameter value and a pointer to the next record for that parameter. If the parameter value for a record is the current value then the pointer is “empty” or given a value such as FFH indicating that there is no further record for the parameter. When a parameter value is updated the pointer for the previous current value is changed from “empty” to having the address of the record in which the new parameter value is to be stored. The new record has the new value stored in it, and an “empty” pointer.
Parameter values are stored in the linked list structure until the current parameter block is full. When this point is reached the latest value for each parameter is stored in the second parameter block, now the current parameter block, and the linked list structure continues in the new current block. The original current parameter block is then erased.
However, although Flash Memory addresses some of the problems and drawbacks associated with EEPROMs and the like, Flash Memory has its own drawbacks. During an erase cycle it is not possible to read from any block, whether or not that block is being erased, which is a significant disadvantage over EEPROM where data can be read or written to any individual byte. Additionally, the number of erase cycles which Flash Memory can undergo before degradation in performance occurs is limited to about 100,000 erase cycles, which is significantly less than the limitation on EEPROMs.
The present invention aims to ameliorate at least one of the problems or drawbacks experienced with flash memory devices.
SUMMARY OF INVENTION
In accordance with an embodiment of a first aspect of the present invention there is provided a memory management method comprising, storing electronic signals representative of parametric data in a volatile memory means, and storing in a non-volatile memory means electronic signals corresponding to the electronic signals representative of parametric data stored in the volatile memory means, said storing electronic signals in the non-volatile memory means being in dependence on the nature of the parametric data, for reducing wear of the non-volatile memory means.
An embodiment of the present invention has an advantage that non-volatile memory is not used each time a parameter or variable value is updated. Instead, volatile memory is used. This reduces wear of non-volatile memory. Additionally, since there are fewer parameter or variable value updates to the non-volatile memory than would otherwise be necessary, the performance of, for example a micro processor, is improved since typically it is quicker to read/write to volatile memory than non-volatile memory. Since non-volatile memory typically requires higher voltages than volatile memory for writing to the memory, an embodiment in accordance with the invention may use less power than conventional memory systems.
In a preferred embodiment of the present invention the electronic signals corresponding to the electronic signals representative of parametric data stored in the volatile memory means are stored in the non-volatile memory means dependent on storing the electronic signals in the non-volatile memory previously occurring concurrently with storing the electronic signals representative of parametric data in the volatile memory means. This addresses the problem that when data has been written to the volatile memory during writing of data to the non-volatile memory, the contents of the volatile and non-volatile memories may be different. In accordance with the preferred embodiment any inconsistency due to such overlapping may be resolved by updating the contents of the volatile memory to the non-volatile memory.
Preferably, the method further comprises the steps of determining a priority level for parametric data represented by the electronic signals stored in the volatile memory means, and initiating storing in the non-volatile memory means the electronic signals corresponding to the electronic signals representative of parametric data stored in the volatile memory means in accordance with a priority level for the parametric data. Typically, the parametric data is categorised having a first high level priority or a second low level priority thereby preferably updating the non-volatile memory important data stored in volatile memory. Optionally, all parametric data may have the same priority level and initiating storing in the non-volatile memory means may be determined by a suitable single criterion to balance likelihood of loss of data against number of stores to non-volatile memory.
Suitably,

Affiliated with

Also associated with

Rating

Memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2583709