Static information storage and retrieval – Addressing
Patent
1998-06-29
1999-12-28
Fears, Terrell W.
Static information storage and retrieval
Addressing
36518901, G11C 1300
Patent
active
060090367
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to the circuit structure of a semiconductor memory.
BACKGROUND ART
Recently, with the spread of the internet and the spread of colour copiers, the market for digital still cameras that read photgraphic data directly into a personal computer (PC) has been growing rapidly.
A simple block diagram of a conventional digital still camera system is shown in FIG. 2. The internal processing of the digital still camera system will be described below referring to FIG. 2. In order to simplify the description, the digital still camera system will be referred to simply as a "camera" in the following.
Image information is taken in to the camera through a charge coupled device (CCD) a. Next, the image data that has been taken in is converted to a digital signal by an input section IC b, and taken in to a graphics memory e. It is common for cameras of intermediate quality or higher to use multiport DRAM or memory known as VRAM in a graphics buffer. This type of multiport DRAM is an internationally standardized memory having two ports, namely a DRAM port that operates exactly the same a general use DRAM, and a SAM port capable of serial access for displaying a picture on a CRT or liquid crystal screen etc.
Data taken in from the CCD can be supplied as a moving image seen through the eyes of camera user either as a video output via sequentially writing into the multiport DRAM, video encoder h, D-A converter i and buffer j, or actually seen on a liquid crystal panel k etc. This is the circuit operation when a picture taken by a television camera is immediately viewed on a television set and not transformed.
Further, in a general camera, there is a shutter in a key input section d, and from the time when a shutter key is caused to be pressed by a digital still container c comprising ROM, RAM, a micro processor core, and a timer, etc., CCD input from a is suspended, and image compression of image information that has been stored in the multiport DRAM (an image at the instant the shutter was pressed) is commenced.
The information stored in the multiport DRAM e is taken in as fixed block information, and the result of compression is temporarily stored in buffer memory f (a general purpose DRAM is generally used).
Here, the SAM port of the multiport DRAM keeps outputting video in the same way as before the shutter is pressed, even while the image information stored in the multiport DRAM is being compressed and transferred to the buffer memory f. At this time, new image information is not transmitted from the CCD, so an image output from the video camera is a still image (the compressed image is this outputted still image).
When this graphics memory does not have the above mentioned two port multiport DRAM, but uses a conventional general purpose memory such as a single port memory, there is no video output while an image obtained by pressing the shutter is being compressed, in other words, an image being viewed by a user is totally dark. Accordingly, the commercial value as a camera does not compare very favorably to a camera using a multiport DRAM.
When video output continues to be output while the shutter is pressed and image data is being compressed, without using this multiport DRAM, a new, separate image memory is currently necessary for image output. Also, as will be described later, in the future a method is being considered of replacing a general purpose DRAM and using an extremely fast synchronous DRAM (SDRAM), and carrying out image compression and video output in time division.
When this type of new separate memory for graphics is used, the mounting area on a port is increased, the number of components is also increased, and the cost therefore rises. Further, when an extremely fast synchronous DRAM (SDRAM) has been used, control becomes difficult, it is unavoidable that accesses to the memory are more than doubled (because compression and video output are carried out at two ports), guaranteeing an operating margin becomes extremely difficult, and the design of the contro
REFERENCES:
patent: 4366559 (1982-12-01), Misaizu et al.
patent: 4947373 (1990-08-01), Yamaguchi et al.
patent: 5313431 (1994-05-01), Uruma et al.
Fears Terrell W.
OKI Electric Industry Co., Ltd.
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