Memory device

Static information storage and retrieval – Read/write circuit – Differential sensing

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Details

365189, G11C 1300

Patent

active

047808535

ABSTRACT:
For improvement of access time, there is disclosed a memory device comprising a plurality of memory cells each having first and second output nodes on which voltages with a slightly difference therebetween appear based on a bit of data stored in the memory cell when the memory cell is selected, a plurality of sense amplifiers one of which is activated to amplify the difference between said voltages appearing on the first and second output nodes of a selected memory cell and the others of which remain inactive condition, each of said sense amplifiers having first and second output nodes on which voltages with large difference therebetween appear when the sense amplifier is activated, and a logic circuit having first and second groups of input nodes electrically connected to the first and second output nodes of said sense amplifiers, respectively, and operative to supply first and second output nodes thereof with voltages relating to the voltages appearing on the first and second output nodes of said activated sense amplifier based on a logical operation thereof.

REFERENCES:
patent: 3969706 (1976-07-01), Proebsting et al.
patent: 4613957 (1986-09-01), Iwahashi et al.

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