Memory device

Details Memory device Memory device

2007-02-27

2007-02-27

Zarabian, Amir (Department: 2827)

Static information storage and retrieval

Systems using particular element

Resistive

C365S203000, C365S207000

Reexamination Certificate

active

11069940

ABSTRACT:
A memory device has a data line (DATA-BUS) for connection to a memory cell, a reference line (Reference-BUS) for reference, a precharge circuit (101), a load circuit (102), and an amplifier circuit (103). The precharge circuit is connected to the data line and the reference line and configured to precharge the data line and the reference line. The load circuit is connected to the data line and the reference line and configured to apply a first constant current to the data line and apply a second constant current which is smaller than the first constant current to the reference line. The amplification circuit is connected to the data line and the reference line and configured to amplify a differential voltage between the data line and the reference line.

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patent: 10-209304 (1998-08-01), None
patent: 10-261298 (1998-09-01), None
patent: 2002-237194 (2002-08-01), None

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