Memory device

Details Memory device Memory device

2006-06-13

2006-06-13

Luu, Chuong Anh (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S774000, C257S374000, C257S510000

Reexamination Certificate

active

07061041

ABSTRACT:
A memory device is provided. The memory device comprises a substrate, first isolation structures, stacked device structures, and second isolation structures. The substrate comprises a memory cell area and a periphery area having trenches therein. Each stacked device structure is disposed between two neighboring trenches over the substrate. The stacked device structure comprises a gate dielectric layer and a gate layer. The gate dielectric layer covers part of the substrate. The second isolation structures are disposed between neighboring stacked device structures. The second isolation structure comprises a liner and an isolation layer. The liner is disposed on the sidewalls of the gate dielectric layer, the surface of the trenches, and the surface of the substrate not covered by the dielectric layer. The liner over the surface of the substrate not covered by the dielectric layer has a round curve. The isolation layer covers the liner, and fills the trenches.

REFERENCES:
patent: 6146970 (2000-11-01), Witek et al.
patent: 6806132 (2004-10-01), Mori et al.
patent: 2002/0187615 (2002-12-01), Liou

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