Memory defect masking device

Static information storage and retrieval – Read/write circuit – Bad bit

Patent

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Details

36523003, 371 102, G11C 700

Patent

active

052787931

ABSTRACT:
A memory defect masking device is to be used in combination with defective memory devices. The memory masking device first stores the addresses of defective memory spaces of the defective memory devices therein and then compares the memory address present at the address lines of the defective memory devices with the addresses stored therein. The defective memory devices are disabled when the memory address present at the address lines tallies with one of the addresses stored in the memory defect masking device. The memory defect masking device is also connected to the data lines of the defective memory devices to permit the former to act as a replacement for the defective space of the defective memory devices. The defective memory devices is therefore operated as if it has no defective memory space.

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