Memory controller with programmable configuration

Details Memory controller with programmable configuration Memory controller with programmable configuration

2005-04-05

2005-04-05

Nguyen, Hiep T. (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S211000

Reexamination Certificate

active

06877076

ABSTRACT:
A memory controller provides programmable flexibility, via one or more configuration registers, for the configuration of the memory. The memory may be optimized for a given application by programming the configuration registers. For example, in one embodiment, the portion of the address of a memory transaction used to select a storage location for access in response to the memory transaction may be programmable. In an implementation designed for DRAM, a first portion may be programmably selected to form the row address and a second portion may be programmable selected to form the column address. Additional embodiments may further include programmable selection of the portion of the address used to select a bank. Still further, interleave modes among memory sections assigned to different chip selects and among two or more channels to memory may be programmable, in some implementations. Furthermore, the portion of the address used to select between interleaved memory sections or interleaved channels may be programmable. One particular implementation may include all of the above programmable features, which may provide a high degree of flexibility in optimizing the memory system.

REFERENCES:
patent: 5241665 (1993-08-01), MacDonald
patent: 5278967 (1994-01-01), Curran
patent: 5307320 (1994-04-01), Farrer et al.
patent: 5329629 (1994-07-01), Horst et al.
patent: 5412788 (1995-05-01), Collins et al.
patent: 5619471 (1997-04-01), Nunziata
patent: 5850632 (1998-12-01), Robertson
patent: 5895481 (1999-04-01), Yap
patent: 6032214 (2000-02-01), Farmwald et al.
patent: 6041393 (2000-03-01), Hsu
patent: 6049855 (2000-04-01), Jeddeloh
patent: 6052134 (2000-04-01), Foster
patent: 6154821 (2000-11-01), Barth et al.
patent: 6154825 (2000-11-01), Murdoch et al.
patent: 6505269 (2003-01-01), Potter
patent: 20010005876 (2001-06-01), Srinivasan et al.
patent: 2 256 293 (1992-12-01), None
Digital Semiconductor 21172, Core Logic Chipset, Technical Reference Manual, © Digital Equipment Corporation, Apr. 1996, Ch. 3 pp. 17-27; Ch. 4 pp. 49-61.
82430 PCIset Cache/Memory Subsystem, © 1993 Intel Corporation, pp. 53-168.
82420 PCIset Cache/Memory Subsystem, © 1993 Intel Corporation, pp. 23-149.
EP Search Report for EP app. 01308014.8, Mar. 29, 2004, Broadcom Corp.

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