Memory controller with a cache memory and control method of cach

Details Memory controller with a cache memory and control method of cach Memory controller with a cache memory and control method of cach

1989-08-08

1993-10-12

Dixon, Joseph L.

Boots, shoes, and leggings

364DIG1, 3642543, 3642548, G06F 1202

Patent

active

052533514

ABSTRACT:
In a control unit having a external storage device, a method for selecting a loading method of data stored in the cache memory into the cache memory in accordance with an access pattern to the data, and an apparatus therefor are disclosed. The selection of the loading method is selection of control mode or procedure in accordance with the loading method, and it is attained by a learn function.

REFERENCES:
patent: 4430701 (1984-02-01), Christian et al.
patent: 4792898 (1988-12-01), McCarthy et al.
patent: 4897783 (1990-01-01), Nay
IBM System Journal, vol. 24, No. 3/4, 1985, Armonk, New York U.S. pp. 316-334; C. P. Grossman: "Cache-DASD storage design for improving system performance".
IBM Technical Disclosure Bulletin, vol. 30, No. 8, Jan. 1988, New York U.S. p. 149 "I/O Sequential direction in cache control units".
IBM Technical Disclosure Bulletin, vol. 34, No. 5, Aug. 1981, New York US pp. 1559-1562; Bennett et al.: "Improving performance of buffered DASD to which some reference are sequential".

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