Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2006-01-24
2006-01-24
Kim, Hong (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S167000, C711S156000, C711S170000, C711S105000, C713S500000, C365S189080, C365S193000
Reexamination Certificate
active
06990562
ABSTRACT:
A memory controller is provided with a memory to store indications of data/strobe ratios that are required to access memory devices that are coupled to the memory controller. The memory controller is also provided with a memory interface through which the memory controller initiates data transmissions with the memory devices. For a data transmission initiated with a particular one of the memory devices, the ratio of data signals to strobe signals sent/received through the interface is dynamically determined in response to a corresponding indication of a data/strobe ratio stored in the memory.
REFERENCES:
patent: 5418924 (1995-05-01), Dresser
patent: 5522064 (1996-05-01), Aldereguia et al.
patent: 5701438 (1997-12-01), Bains
patent: 5727005 (1998-03-01), Le et al.
patent: 5809340 (1998-09-01), Bertone et al.
patent: 5906003 (1999-05-01), Runas
patent: 5974499 (1999-10-01), Norman et al.
patent: 6005412 (1999-12-01), Ranjan et al.
patent: 6065132 (2000-05-01), Takano
patent: 6125078 (2000-09-01), Ooishi et al.
patent: 6144598 (2000-11-01), Cooper et al.
patent: 6288971 (2001-09-01), Kim
patent: 6324119 (2001-11-01), Kim
patent: 6338113 (2002-01-01), Kubo et al.
patent: 6370630 (2002-04-01), Mizuyabu et al.
patent: 6414868 (2002-07-01), Wong et al.
patent: 6424198 (2002-07-01), Wolford
patent: 6480946 (2002-11-01), Tomishima et al.
patent: 6530001 (2003-03-01), Lee
patent: 6532525 (2003-03-01), Aleksic et al.
patent: 6553450 (2003-04-01), Dodd et al.
patent: 6570944 (2003-05-01), Best et al.
patent: 6625702 (2003-09-01), Rentschler et al.
patent: 6633965 (2003-10-01), Rentschler et al.
patent: 2001/0003837 (2001-06-01), Norman et al.
patent: 2001/0046163 (2001-11-01), Yanagawa
patent: 2001/0054135 (2001-12-01), Matsuda
patent: 2002/0147896 (2002-10-01), Rentschler et al.
patent: 2002/0172079 (2002-11-01), Hargis et al.
patent: 2004/0240275 (2004-12-01), Koo
patent: WO99/04494 (1999-01-01), None
“DDR SDRAM Registered DIMM Design Specification”, IBM, Mar. 2000 (62 pages).
“DDR SDRAM Module Serial Presence Detect Definitions”, IBM, Oct. 1999 (34 pages).
JEDEC Standard No. 79, “Double Data Rate (DDR) SDRAM Specification”, Jun. 2000 (72 pages).
“Preliminary Publication of JEDEC Semiconductor Memory Standards-DDR SDRAM Specification”, Aug. 1999 (73 pages).
Hargis Jeffrey G.
Letey George T.
Rentschler Eric M.
Hewlett--Packard Development Company, L.P.
Kim Hong
LandOfFree
Memory controller to communicate with memory devices that... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory controller to communicate with memory devices that..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory controller to communicate with memory devices that... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3545233